Intel delays next-gen Itanium again - second time this year

Following the February delay of Tukwila, Intel’s upcoming next-gen 65nm, quad-core, 30MB on-die cache (total), HyperThreading-enabled Itanium with quad on-die memory controllers (each with double-data correction), Intel has sought to do a repeat, this time delaying the product to EOMs until at least 1Q’2010.
While the previous delay was to reportedly to address memory controller enhancements, including use of Intel’s QuickPath Interconnect (QPI), the current issue relates to CPU scaling.

Intel wrote in a statement:

During final system-level testing, we identified an opportunity to further enhance application scalability.

About Itanium

Itanium is Intel’s super high-end 64-bit CPU for enterprise applications. It uses a completely different ISA than any other type of CPU, called EPIC, which stands for Explicitly Parallel Instruction Computing. The architecture itself is geared toward heavy computation with some amazing chip-level abilities which are not present in the more common x86 hardware space, such as predication (where an instruction can be executed or not based on some flag being either raised or lowered — such flags are usually the result of a previous operation), speculative execution, and all in a bundled instruction environment designed to maximize on-die resources at compile-time (since compilers typically know considerably more about the code they’re generating than do any runtime-level speedups).

Itanium was predicted in 2005 to become a $10 billion annual business by the end of the decade. However, constant delays and continued R&D into the traditional x86 architecture has forced its use to be reduced notably (as the graph above indicates), even as of 2007. In 2005, Sun Microsystems’ co-founder, Andy Bechtolsheim, had declared Itanium basically dead.

Since then, and with the recent advances seen in Intel’s Nehalem (and upcoming Nehalem-EX) Xeon server CPUs, the reality is Itanium may not be long for this world as there does not seem to be any practical reason to continue using it, except for the absolute super-high-end of compute needs, where Itanium does still shine.

Tukwila, the 65nm die shrink and significant core revamp, will provide four memory controllers for DDR3, allowing a maximum of 96GB/s of interprocessor bandwidth, and 34GB/s peak memory bandwidth (per physical CPU/socket), with each socket having its own dedicated memory network at the same speeds.

The follow-on Itanium, Poulson, will skip the 45nm process and go straight to 32nm, indicating a release date sometime 2011 or after. A possible follow-on beyond Poulson will be Kittson, though it is still speculative at this point.

WSJ via

Rick’s Opinion

Seems odd for this kind of scaling delay considering that such revisions could be implemented in later products, or very likely, through future BIOS updates. In fact, Intel has released products with known issues, those that were later addressed and fixed in stepping upgrades, allowing for better performance, faster clocking, cooler operations, higher manufacturing yields, etc.

These were admittedly in their much higher volume x86 lines of CPUs. However, considering the limited runs Itanium will be supporting… I’m not entirely sure how delaying Itanium further will help Intel. Perhaps this second delay this year relates to the recent EU fine of $1.45 billion, causing some money to be pulled from unnecessary R&D? Just a thought.

BY Rick Hodgin

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